A Reliable Low-latency Interconnect for Tightly-Coupled On-chip Communication” was published by researchers at ETH Zurich.

Researchers from La Trobe University, Deakin University, Monash University, and Swinburne University of Technology developed ...

Morgan Stanley (May 14, 2025) predicted a humanoid robot market (let’s call this GPR: general-purpose robots) of $5 trillion ...

New DRAM standard aims to solve a critical bottleneck.

A focus on predictable and low-jitter performance will make Wi-Fi 8 appealing for ultra-high reliability applications.

A new technical paper titled “In Situ Atomic-Scale Investigation of Electromigration Behavior in Cu–Cu Joints at High Current ...

A new technical paper titled “Thermal characteristics of a double intra-cavity contact VCSEL for cryogenic optical links” was ...

Aware Fine-Tuning of Spiking Q-Networks on the SpiNNaker2 Neuromorphic Platform” was published by researchers at TU Dresden, ...

The key element of SIOV is the Scalable Device Interface (SDI), a “lightweight” and composable virtual interface designed for ...

LPDDR6; hardware root of trust; PCB crosstalk; structured design data; multiphysics for multi-die; IoT shifts; Scope 3 ...

A Framework for Cross-Tool Virtual Prototyping” was published by researchers at RWTH Aachen University, MachineWare and ...

How AI is reshaping EDA, and how it will help chipmakers to focus on domain-specific solutions.